Junghwan PARK1, Jong-sik PARK1, Jaekyung WEE1, Boo-gyoun KIM1, Seok LEE2, Seong-soo LEE1
1. School of Electronics Engineering, Soongsil University, Seoul 156-743, Korea; 2. Intelligent System Research Division, Korea Institute of Science and Technolo gy, Seoul, Korea
Abstract-The Image sensor needs various image processing by I mage Signal Processor (ISP) to improve image quality. Conventional cameras have their own software ISP functions to perfo rm in PC instead of using commercial ISP chips. However these methods have probl ems such as large computation for image processing. In this paper, th authors pr oposed ISP that significantly reduced chip area by efficiently sharing of hardwa re and software. Large operation blocks are designed to hardware for high perfor mances, and hardware is imployed simultaneously with software considering the si ze of the hard ware. The implemented ISP can process Video Graphics Array (VGA) (640*480) image s and has 91 450 gates size in 0.35 μm process.
Key words-Image Signal Processing; vision camera; low a rea; image process
Manuscript Number: 1674-8042(2010)04-0391-04
dio: 10.3969/j.issn.1674-8042.2010.04.20
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